Customer Reviews

Based on 2 reviews
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W
W. Namyslo
Item as described

Item as described, good seller.

D
D. Poletaev
Everything works fine

Everything works fine. Each LRCLK frame contains 32 BCK cycles, but the audio samples themselves are 16-bit. The data bits are output on the positive front of the BCK, from the high-order bit to the low bit. The data is left-justified, but shifted one clockwise to the right with respect to LRCLK, so the first BCK pulse is always idle. That is, the data uses cycles from 2 to 17. For the left channel, LRCLK = 0, for the right LRCLK = 1. The I2S outputs are 3.3 volts.